Voltage balance relay circuit

ABSTRACT

A protective circuit for an electric polyphase system for indicating conditions of voltage unbalance between the phases, and for actuating a relay in response thereto.

United States Patent Beckwith Mar. 7, 1972 [54] VOLTAGE BALANCE RELAYCIRCUIT [56] References Cited [72] lnventor: Robert W. Beckwith, 1002Greenfield UNITED STATES PATENTS Lane, Mount Prospect, [IL 600503,155,880 11/1964 Salina ..3l7/27 X 1 Filed: a- 24, 1970 3,535,58910/1970 Bourgeault ..3l7/27 x [21] Appl. No.2 66,486

Primary Examiner-James D. Trammell Attorney-Stone, Zummer, Livingston &Aubel [52] U.S.Cl. ..317/27 R, 328/133 [51] Int. Cl. ..H02|l 3/26 57ABSTRACT [58] Field of Search ..3l7/27 R, 47; 340/253 1-1;

328/133 A protective circuit for an electric polyphase system forindicating conditions of voltage unbalance between the phases, and foractuating a relay in response thereto.

4 Claims, 3 Drawing Figures VOLTAGE BALANCE RELAY CIRCUIT Phaseunbalance in a three-phase electrical system may occur for example withunequal single-phase loading of one or two phases of the three-phasesystem. Such unbalance can cause three-phase motors to run attemperatures above their rating with resulting deterioration ofinsulation and decreased life.

Phase failure, which is an extreme instance of phase unbalance, in athree-phase :electrical system may occur for a number of reasons such aswhen the circuit is struck by lightning, a fuse blows, or as a result ofa mechanical failure which opens one line of the system. A three-phasemotor which is operating at the time of a single phase failure willcontinue to run but draws increased current through the remaining twolines resulting in the possible overheating.

Accordingly, it is an object of the present invention to provide animproved circuit for detecting a phase unbalance.

It is another object of the present invention toprovide an improvedcircuit capable of actuating a relay in response to a voltage unbalance.

An unbalanced voltage condition may be common in certain industrialplants and the inventive circuit can be used to give an alarm and permitbalancing the load before overheating or automatic turnoff of motors.

In other cases, motors may be protected by a fuse in each of thethree-phase lines. If one fuse blows, the motor will continue to runwith the remaining single phase input, but will overheat. Moreover ifthe fuse blew due to a short circuit, the motor will generate partialvoltage on the open phase, feeding current to the short, and causingdamage and possible fire. Theinventive circuit may be used to detect thevoltage unbalance, which results after a blown fuse, and trip the motorstarter removing the remainingvoltage to the motor.

In other cases, the inventive circuit may be used to detect unbalance ona circuit feeding a number of motors. Otherwise a blown fuse on onemotor could cause damage to all motors on a circuit.

The foregoing and other features and advantages of the invention will beapparent from the following more particular description as illustratedin the accompanying drawings wherein:

FIG. 1 is a block diagram showingthe relative connections of the voltagebalance circuit of the invention with an associated'motor, display unitand motor interrupt circuit.

FIG. 2 is a schematic diagram of the voltage balance circuit of theinvention; and

FIG. 3 is a schematic diagram of a modification of the voltage balancecircuit shown in FIG. 2.

Referring to FIG. 1, the input from a three-phase, threewire system withphases labeled as A, B and C is coupled through conductive lines 13, and17 to a three-phase motor 12 and parallel to the voltage balance relaycircuit 11 which is the subject matter of the invention. The output ofthe voltage balance relay circuit 11 is coupled to a display unit 18 ofany suitable known type and which can be simply a display light. Thevoltage balance relay circuit 11 may also be connected to a motorinterrupt circuit 20 which can in turn be connected to the motor circuitto turnoff the motor 12.

As explained hereinafter, the voltage balance relay circuit 11 has abuilt in time delay so that transients and momentary voltage unbalancesare filtered out, and so that display unit 18 and interrupt circuit 20are not activated during such transients and momentary unbalances.

The circuit diagram of the voltage balance circuit 11 is shown in FIG.2. The circuit connections will first be described with reference toFIG. 2 and then the operation of the circuit will be described.

In FIG. 2, lines 13, 15 and 17 connect to the circuit 11 at terminalpoints 21, 23 and 25 respectively. Terminal points 21, 23 and 25 areconnected respectively through resistors R1, R2 and R3, and throughtrimmer potentiometers R13 and R14 to a first or sensing neutralconductive line 27. Resistor R1 is connected through a portion ofpotentiometer R13 and variable tap 28 to neutral line 27; resistor R2 isconnected to the junction of potentiometers R13 and R14; and, resistorR3 is connected through a portion of resistor R14 and variable tap 29 toneutral line 27. The trimmer potentiometers R13 and R14 permit theproper balancing of the bridge circuit of resistor R1, R2 and R3 suchthat these latter resistors need not be held to such close tolerancesrelative to one another. Terminal points 21, 23 and 25 are alsoconnected respectively through diodes D3, D2 and D1 to a conductive line31.

Resistor R4 and capacitor C1 are connected across line 31 to neutralline 27. Resistor R1, R2 and R3 together with their respective diodesD1, D2 and D3 develop a negative voltage at conductive line 31 relativeto the artificially developed neutral reference at line 27. That is, avoltage is developed across resistor R4 and capacitor C1 which isproportional to the highest or largest phase-to-neutral voltage; andwhich voltage is indicated at Emax in FIG. 2.

Terminal point 21 is also connected through a diode D4 and line 32 to aRC circuit comprising a resistor R5 and capacitor C2; terminal point 23is connected through to diode D5 and line 33 to an RC circuit comprisinga resistor R6 and capacitor C3; and, terminal point 25 is connectedthrough diode D6 and line 34 to an RC circuit comprising a resistor R7and a capacitor C4. The other terminal of each of the foregoing RCcircuits is connected to neutral line 27.

The combination of diode D4, resistor R5 and capacitor C2 develops anegative voltage at line 32 proportional to the phase A-to-neutralvoltage. Similarly the combination of diode D5, R6 and C3; and thecombination of diode D6, R7 and C4 develop a negative voltage at lines33 and 34 respectively proportional to the phase B-to-neutral, and phaseC-toneutral voltage.

Lines 32, 33 and 34 are connected through respective diodes D7, D8 andD9 to a common terminal 40. The minimum voltage on lines 32, 33 or 34,that is the minimum voltage across the respective RC circuits, willcause terminal point 40 to move up to that potential; indicated in FIG.2 as E Terminals 21, 23 and 25 are also respectively connected to oneend of resistors R8, R9 and R10. The other end of resistors R8, R9 andR10 are connected in common. Resistors R8, R9 and R10 form a second orpower neutral at common point 35 to provide power to the relay K1through diode D10 and line 36. The potential at terminal point 35 varieswith the current flowing in line 36, which in time varies dependent onthe current flowing through the relay Kl, hence the voltage on line 36must be separated from the sensing neutral on line 27 A voltage limitingZener diode D15 is connected across lines 36 and 31 and a capacitor C6is connected in parallel to diode D15.

The diode D10 enables capacitor C6 to charge to the peak potentialacross lines 36 and 31 through resistors R8 and diode D3; or throughresistor R9 and diode D2; or through resistor R10 and diode D1 while yetpreventing reverse flow through R8, R9 or R10 during those parts of thecycle when the neutral voltage at point 35 is less than the DC voltageacross capacitor C6.

The voltage E min at terminal 40 is compared with the voltage E max online 31 by the following circuit. Terminal point 40 is connected throughresistors R11, R12 and a diode D11 to line 31. The junction of resistorsR11 and R12 connects through lead 41 and across capacitor C5 as oneinput to a differential amplifier Q2 of any suitable known design suchas a Fairchild uA74 1C.

The voltage balance circuit 11 would normally be mounted on the motorpanel in an environment which may be susceptible to large variations intemperature. Accordingly, it is desirable that the voltage balance relaybe temperature stable. It was noted that there is a temperaturedependent drop through diodes D7, D8 and D9 especially near the balancelevel. In order to compensate for this drop the series circuit of thetwo resistors R11 and R12 of equal resistance and the diode D1 1 areconnected from terminal point 40 to line 31. In operation, assume thatwith increasing temperature the voltthe cathode of diode D11 andresistor R12 will move down.

Because of this compensating variation, the voltage at the junction ofresistors R11 and R12 will remain relatively stable in spite oftemperature changes.

Differential amplifier Q2 receives its power through resistor R15 fromline 36. Resistor R15 also connects through a variable resistor R18 toline 31. A variable tap 48 on resistor R18 connects to the other inputof amplifier O2 to provide a sensitivity adjustment which determines atwhat percentage change in rated voltage the amplifier Q2 will be causedto operate and relay [(1 to be activated. One selected setting has beento set tap 48 to detect or sense a percent change in rated voltage inputon any phase.

Zener diodes D12 and D13 are connected in series with each other andacross resistor 18 to limit the voltage applied to Q2. The output ofdifferential amplifier Q2 is connected through resistor R16 as an inputto the base of a common emitter connected NPN transistor Q1. Thecollector of Q1 is connected to the coil 45 of the relay K1. A diode 16connected across coil Kl dampens the inductive kick of coil 45. A Zenerdiode D14 is connected from the emitter of transistor Q1 to line 31.

As mentioned above, the circuit 11 includes a time delay factor.Capacitor C5 and the resistor 11 delay the voltage buildup betweenterminal point 40 and line 31 to provide a time delay to prevent falseoperation of the relay K1 due to transient or momentary phase unbalance.A time delay of say 20 seconds can be provided to operate the relay K1during a period of slight unbalance, and a time delay of say 2 secondsfor complete loss of one phase.

The operation of the circuit will now be briefly explained. Assume anormal operation wherein the voltage of phases A, B and C are equal. Inthis case the potentials at terminal point 21, 23 and 25 will be equaland the voltage across the neutral line 27 to line 31; that is, Emaxwill be essentially the same as the voltage on terminals 21, 23 and 25.

The voltages developed on lines 32, 33 and 34; that is, the voltageacross C2, C3 and C4 will also be equal to each other, and will be equalto the voltage at terminal points 21, 23 and 25. Thevoltage Emin atterminal point 40 willbe essentially equal to the voltage at terminalpoints 21, 23 and 25 and hence the relationis Emin Emax. Accordingly thevoltage across capacitor C5 and the associated resistor will beessentially zero, and differential amplifier Q2 will remain unenergized.

If one of the phase voltages, say phase A, decreases more than 5 percentof its rated voltage while the voltages on the other phases remain thesame, the voltage Emax will remain the same. Note that Emax isproportional to the maximum voltage at any of terminal points 21, 23 or25. However, the voltage appearing on line 32 proportional to thevoltage on phase A will be decreased hence the voltage E min at terminalpoint 40 will rise to a less negative level and, accordingly, a voltagewhich may be expressed as the difference between Emin and Emax will bedeveloped across resistor R12 and diode D11 and capacitor C5. If theunbalance exists for more than a preselected period of time, thecapacitor C5 will be charged to this potential Emin-Emax and causedifierential amplifier Q2 to be energized in turn providing a voltage tocause transistor O1 to conduct and energize the coil 45 of relay K1through the circuit including line 36, diode D and parallel connectedresistors R8, R9 and R10. Relay coil 45 will continue to be energizedand relay 31 will remain in its activated position until the circuitpower is turned off.

In- FIG. 1, an additional amplifier 03 similar to Q2 may be connected tothe circuit via lines 51 and 52. Amplifier O3 is useful, as indicated,when it is desired to connect an output of the circuit of FIG. 1 to anassociated, indicating or recording meter. In case the relay K1 is notrequired, the meter can be connected directl to Q2.

A minor modl matron of the circuit IS shown in FIG 3 wherein resistorsR1, R2 and R3 are made variable to provide an initial balancing of thecircuit as described above. In FIG. 3 units R13 and R14 need not bevariable since sufficient variation of resistance is provided by unitsR1, R2 and R3.

While the invention has been particularly shown and described withreference to a preferred embodiments thereof, it will be understood bythose skilled in the art that various changes in form and details may bemade therein without departing from the spirit and scope of theinvention. For example, the inventive circuit is also applicable for asystem having a number of phase inputs N greater than three. In thislatter case a diode-resistor combination (note Rl-Dl, R2-D2, R3-D3 inFIG. 1) is provided for each input and connected to develop a neutralreference voltage and to have a common connection to develop the maximumamplitude voltage. RC networks (note RS-CZ, R6-C3 and R7-C4 in FIG. 1)are included for developing the N phase-toneutral voltages proportionalto the minimum amplitude of each of said N input voltages. Theassociated relay and indicator such as shown in FIG. 1 will respond tothe difference between the maximum and minimum voltages on the N phaseleads to neutral voltages.

I claim:

1. A circuit for sensing voltage unbalance between the various phasevoltages in a three phase-three wire electrical line system comprising,in combination, means for developing an artificial neutral reference,means for developing a phase to neutral voltage proportional to themaximum amplitude of any of said phase voltages, means for developing aphase to neutral voltage proportional to the minimum amplitude of any ofsaid phase voltages, and means for comparing said minimum and maximumvoltages and developing an output voltage propor tional to thedifference between said minimum and maximum voltages.

2. A circuit as in claim 1 wherein said means for developing saidneutral reference comprise resistor means connected in series to diodemeans, said phase voltages being coupled to the junction of respectiveones of said resistor and diode means said resistor means connected toprovide said neutral reference, and said diodes having a commonconnection to provide said maximum amplitude voltage.

3. A circuit as in claim 1 further including a temperature compensatingnetwork including diode means connecting the separate phase voltages toa common terminal, a series circuit comprising a second diode andresistor means connected between said common terminal and the maximumvoltage potential, output means connected to an intermediate point ofsaid resistor means whereby in response to temperature changes saidsecond diode pulls the voltage at one end of said resistor meansopposite to the direction which said diode means pull the other end ofsaid resistor means to thereby tend to maintain the voltage at saidintermediate point stable.

4. A circuit as in claim 1 further including potentiometer having meansconnected intermediate, said reference neutral for providing initialbalancing of said phase voltages, said potentiometer having variablefirst resistor means connected to one terminal of said potentiometer, asecond resistor means connected to the other terminal of saidpotentiometer, and a third resistor means connected to a center point onsaid potentiometer whereby a balance is obtained of said phase voltageby adjustment of said variable taps.

1. A circuit for sensing voltage unbalance between the various phasevoltages in a three phase-three wire electrical line system comprising,in combination, means for developing an artificial neutral reference,means for developing a phase to neutral voltage proportional to themaximum amplitude of any of said phase voltages, means for developing aphase to neutral voltage proportional to the minimum amplitude of any ofsaid phase voltages, and means for comparing said minimum and maximumvoltages and developing an output voltage proportional to the differencebetween said minimum and maximum voltages.
 2. A circuit as in claim 1wherein said means for developing said neutral reference compriseresistor means connected in series to diode means, said phase voltagesbeing coupled to the junction of respective ones of said resistor anddiode means said resistor means connected to provide said neutralreference, and said diodes having a common connection to provide saidmaximum amplitude voltage.
 3. A circuit as in claim 1 further includinga temperature compensating network including diode means connecting theseparate phase voltages to a common terminal, a series circuitcomprising a second diode and resistor means cOnnected between saidcommon terminal and the maximum voltage potential, output meansconnected to an intermediate point of said resistor means whereby inresponse to temperature changes said second diode pulls the voltage atone end of said resistor means opposite to the direction which saiddiode means pull the other end of said resistor means to thereby tend tomaintain the voltage at said intermediate point stable.
 4. A circuit asin claim 1 further including potentiometer having means connectedintermediate, said reference neutral for providing initial balancing ofsaid phase voltages, said potentiometer having variable first resistormeans connected to one terminal of said potentiometer, a second resistormeans connected to the other terminal of said potentiometer, and a thirdresistor means connected to a center point on said potentiometer wherebya balance is obtained of said phase voltage by adjustment of saidvariable taps.